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The AI chip race is shifting to inference, not training

Industry leaders discuss cost-per-token economics, memory bandwidth, and chip architectures needed to run AI at scale.

Summarized from Imagination in Action, . 25-second read.

This story is from October 2, 2026. For the latest, see today's news.

A panel of executives from DeepInfra, Abacus , MemVerge and Positron explores why the competitive focus in AI chips is moving from training to —the process of running deployed models. The discussion covers the economics of serving AI queries, including cost per token, memory bandwidth constraints, and the specialized chip designs emerging to handle these workloads.

The speakers also address manufacturing bottlenecks, memory requirements for , and the cloud infrastructure needed to scale inference. The conversation bridges the gap between prototype development and real-world deployment, highlighting how inference efficiency is becoming the limiting factor for AI companies trying to operate profitably at scale.

Read the full story at Imagination in Action

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